Xilinx EDK disable IOB IOBs instantiated automatically

When tri-state ports are used in EDK (e.g. GPIO), and IOB will be automatically instantiated. This is because the FPGA has no internal bi-directional paths.

To avoid automatic insertation of the IOBs, GPIO should not be bi-directional.

Do not connect the GPIO_IO port, and instead, only connect the _I or _O ports


BEGIN axi_gpio
 PARAMETER INSTANCE = leds
 PARAMETER HW_VER = 1.01.b
 PARAMETER C_INTERRUPT_PRESENT = 1
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_BASEADDR = 0x41200000
 PARAMETER C_HIGHADDR = 0x4120ffff
 BUS_INTERFACE S_AXI = axi_interconnect_1
 PORT S_AXI_ACLK = processing_system7_0_FCLK_CLK0
 PORT GPIO_IO_O = leds_GPIO_IO_O
END